Storage elements as described in the present application are often known as “latches”. These are re-writable, non-volatile storage elements used for storing small amounts of data. Normally the amount of data ranges from 1 bit up to several 100 bits. The data is retained even if the power supply to the storage element is switched off. A large number of such storage elements are frequently used in electronic integrated circuits. The surface area occupied by one storage element should therefore be as small as possible.
Non-volatile memories are already known. In these non-volatile standard memories, complex addressing is used with correspondingly complex circuit components. In addition, a sense amplifier is needed in order to be able to read out data from the non-volatile memory. The use of non-volatile standard memories is therefore relatively complex and occupies a large surface area.
U.S. Pat. No. 6,411,545 discloses a non-volatile latch in which a source-coupled storage element and two write inputs are provided on the high-voltage side, plus an isolated data output.
U.S. Pat. No. 5,648,930 discloses a non-volatile latch having drain-coupled storage elements as typically provided in a RAM. The latches comprise a data input and a data output. They are programmed via power busses.
U.S. Pat. No. 5,523,971 discloses a non-volatile latch comprising eight transistors. The non-volatile latch is isolated from the supply voltage during the programming operation.
U.S. Pat. No. 4,132,904 discloses a non-volatile latch, which has the disadvantage, however, that when data is read out again it is inverted compared to the previously written data.
U.S. Pat. No. 4,348,745 discloses a non-volatile latch, which requires twelve transistors and a programming voltage of 17 V, which makes this latch relatively complex.